Posts Tagged ‘ ESL ’

Esencia weighs in on the $10K Chip

Jan 4th, 2013 | By

ESL startup Esencia has been making noise about the changing of the guard in IC design as the industry moves from RTL to ESL. In this third part of our series on the Quest the the 10K Chip, Karl Kaiser, VP of engineering for Esencia, talks about Gary Smith’s view of the cost of IC design and where ESL can continually lower that cost.



Gary Smith, ESL and the Quest for the $10K Chip

Jan 2nd, 2013 | By

In part two of our Quest for the 10K chip series, EDA Analyst Gary Smith discusses the need for ESL, how it will reduce the cost of designs, and why the time is right for ESL to be implemented now. Smith says in the past, we’ve leveraged IP reuse as a way to solve our design challenges, but we are now seeing 100 block designs with 100 million gate counts; IP reuse alone will not solve these challenges. In this video Smith discusses what he sees coming next to solve these challenges.

See Part 1 here.

 

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Forte Design expanding use of ESL paradigm

Jul 19th, 2010 | By

Brett Cline of Forte Design talks about ESL in this fifth part in the series of interviews from DAC 2010 in Anaheim.